NePSim: A Network Processor Simulator with Power Evaluation
Framework
Introduction
There is an increasing interest in the network processor (NP) architecture design as well
as its power dissipation characteristics. However, there has not
been an open-source simulation infrastructure that makes the
performance/power tradeoffs in NPs clearly visible to computer
architects.
NePSim is the first open source integrated infrastructure for
analyzing and optimizing NP design and power dissipation at
architecture-level. NePSim contains a cycle-accurate simulator for a
typical NP architecture (Intel's IXP1200), an automatic verification
framework for testing and validation, and a power estimation model for
measuring the power consumption of the simulated NP. NePSim achieves
satisfactory accuracy in both performance and power modeling.
Following the success of NePSim, NePSim2 is developed to model more
advanced network processor architectures such as Intel IXP2xxx NPs.
There are significant differences between IXP2xxx and IXP1200, to name a few,
more microengines and threads, MEv2 instruction set, new interconnection (MSF),
next neighbor registers,and generalized signaling scheme, etc.
These new features make the development of NePSim2 very challenging.
We have incorporated a set of cryptographic benchmark applications along with a
number of basic testcases. Our goal is to make NePSim2 a complete performance
and power simulation tool for modern NPs like IXP2xxx processors. We are in
active development and welcome contributions from the community.
The NePSim2 beta release is available for non-commercial use only. Download NePSim2
The NePSim 1.0 is available for non-commercial use only. This release
does not include SRAM or SDRAM power model. Download NePSim 1.0
The verification tool (LOCGEN) can be downloaded from PAC.
Publication
Jia Yu, Jun Yang, Shaojie Chen, Yan Luo and Laxmi Bhuyan, "Enhancing Network Processor Simulation Speed With Statistical Input Sampling,"
2005 International Conference on High Performance Embedded Architectures & Compilers, LNCS
Vol. 3793, pp. 68 - 83, 2005, Springer-Verlag Publishers.
Xi Chen, Yan Luo, Harry Hsieh, Laxmi Bhuyan, F. Balarin, "Utilizing Formal Assertions for System Design of Network Processors," Design Forum, Design Automation and Test in Europe (DATE), 2004.